PUBLICATIONS
- 10) Byeong-Woo Yoo, Joon-Gyu Kim, Min-Jae Kim, Min-Sung Kim S.-Y. Park, “Single-Stage Wireless CC-CV Resonant Battery Charger with Coupling Range Extension Scheme for Implantable Biomedical Applications,” The 31th Korean Conference on Semiconductors, Jan. 2024
- 9) Sungjin Oh, Hyunsoo Song, Nathan Slager, Jose RL Ruiz, S.-Y. Park, Euisik Yoon, “LFP-Adaptive Dynamic Zoom-and-Tracking Dual-Band Neural Recording Front-End Using a Power-Efficient Incremental Delta-Sigma ADC,” 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Oct. 2022
- 8) Hyeon-Tae Park, Joon-Gyu Kim, Min-Jae Kim, Sang-Min Song, and S.-Y. Park, “A Low-Power, Hign-Resolution, Two-Step ADC with VCO-Based Multibit Phase Domain Quantizer for Biomedical Applications,” The 29th Korean Conference on Semiconductors, Jan. 2022
- 7) Min Jae kim, Hyun Tae Park, Jun Gyu kim, Sang Min Song, S.-Y. Park, “A 216nW, 5.49µVrms Neural Recording Amplifier Using Current-Reuse Folded Cascode OTA With a 1.37 Power Efficiency Factor,” The 29th Korean Conference on Semiconductors, Jan. 2022
- 6) H. Song, S. Oh, J. Salinas, S.-Y. Park, and E. Yoon, “A 5.1ms Low-Latency Face Detection Imager with In-Memory Charge-Domain Computing of Machine-Learning Classifiers,” VLSI circuits, 2021 IEEE Symposium on, Jun. 2021
- 5) A. E. Mendrela, S.-Y. Park, M. Vöröslakos, M. P. Flynn, and E. Yoon, “A Battery-Powered Opto-Electrophysiology Neural Interface with Artifact-Preventing Optical Pulse Shaping,” VLSI circuits, 2018 IEEE Symposium on, Jun. 2018
- 4) S.-Y. Park, J. Cho, and E. Yoon, “3.37 µW/Ch Modular Scalable Neural Recording System with Embedded Lossless Compression for Dynamic Power Reduction,” VLSI circuits, 2017 IEEE Symposium on, Jun. 2017
- 3) K. Lee, S. Park, S.-Y. Park, and E. Yoon “A 272.49 pF/pixel CMOS Image Sensor with Embedded Object Detection and Bio-Inspired 2D Optic Flow Generation for Nano-Air-Vehicle Navigation,” VLSI circuits, 2017 IEEE Symposium on, Jun. 2017
- 2) S.-Y. Park, J. Cho, K. Na, and E. Yoon, “Toward 2014-Channel Parallel Recording: Modular Δ-ΔΣ Analog Front-End with 4.84J/C-s·mm2 Energy-Area Product, VLSI circuits, 2015 IEEE Symposium on, Jun. 2015
- 1) S.-Y. Park, J. Cho, K. Lee, and E. Yoon, “PWM Buck Converter with >80% PCE in 45 μA-to-4 mA Loads Using Analog-Digital Hybrid Control for Implantable Biomedical Systems,” IEEE International Solid-State Circuits Conference, Feb. 2015
